Vlsi Research Papers 2014 Dodge

FULL LISTNEWSEARCH

vlsi research papers 2015 IEEE PAPER



VLSI IMPLEMENTATION OF INTEGER DCT ARCHITECTURES FOR HEVC IN FPGA TECHNOLOGY
free download
Abstract: High Efficiency Video Coding (HEVC) inverse transform for residual coding uses 2-D 4x4 to 32x32 transforms with higher precision as compared to H. 264/AVC's 4x4

CMOS LEVEL SHIFTERS
free download
On-die voltage regulation leading to power 'islands' that can have different voltage levels. Power management that shuts functional units off. Voltage-Frequency pairs; CPU's can be run in several operating points where its power supply is adjusted to reduce power: � lowest

IC Layout Design of Decoder Using Electric VLSI Design System
free download
Circuit (IC) layout for a decoder. The layout was designed by using an open source software namely Electric VLSI Design System as the Electronic Design Automation (EDA) tool. In order to produce the layout, the basic knowledge of fabrication process and IC design

VLSI Implementation of Low Power FIR Filter Design Using APC-OMS Algorithm
free download
Abstract: Memory based structures are used in many kind of digital signal processing (DSP) application. Memory-based structures are better performance In area minimization compare with multiply-accumulate structures and have many other advantages like reduced latency

MINIMIZATION OF VLSI FLOORPLAN USING HYBRID CUCKOO SEARCH AND PSO
free download
Abstract:-Floorplanning is a major issue in the very large-scale integrated (VLSI) circuit design automation. It helps to determine the size, reliability, performance and area of the chip.target of VLSI floorplanning is to minimize both area and wire length Aggressive scaling of semiconductor process technology over the last several decades has resulted in creation of many new products, such as computers, camera, cell phones, and information appliances. This trend is expected to continue for the coming years and create Interconnect has become a crucial element in advanced electronic systems. State-ofthe-art CMOS processes utilize 10 or more layers of metal above the active transistors, so these interconnect layers dominate processing costs. In recent years, interconnect power and

Design of efficient VLSI arithmetic circuits
free download
Abstract Arithmetic and Logic Unit (ALU) is a critical component of any CPU. In ALU, adders play a major role not only in addition but also in performing many other basic arithmetic operations like subtraction, multiplication, etc. Thus realizing an efficient adder is required

Multi Objective Particle Swarm Optimization based Mixed Size Module Placement in VLSICircuit Design
free download
Abstract: Placement process is one of the vital stages in physical design. In this stage, modules and elements of circuit are placed in distinct locations according to optimization basis. Placement algorithms try to minimize the longest delay along the paths in the circuit

A Study on Power Distribution in VLSI
free download
ABSTRACT Low power has emerged as a principal theme in today's world of natural philosophy industries. Power dissipation has become a crucial thought as performance and space for VLSI Chip style. With shrinking technology reducing power consumption and

A VLSI Implementation of High Sensitive Fingerprint Sensor using Parasitic Insensitive Charge Transfer Circuit
free download
Abstract This paper implements 80x64 array high sensitive fingerprint sensor with the parasitic insensitive charge transfer circuit. The fingerprint sensor cell uses an active output voltage feedback integrator. The parasitic insensitive charge transfer circuit includes a

A Scalable VLSI Architecture for Real-Time and Energy-Efficient Sparse Approximation in Compressive Sensing Systems
free download
In recent years, compressive sensing (CS) has attracted great research attention in fields of applied mathematics, computer science, and electrical engineering. CS theory is established on the fundamental fact that most natural signals are highly compressible

A VLSI Design for Scalable High-Speed Digital Winner-Take-All Circuit
free download
(WTA) circuit called simultaneous digital WTA (SDWTA) circuit is presented in this paper. A minimized comparison-cell (w-cell) is developed to reduce the size and to achieve high- speed. The w-cell which is suitable for VLSI implementation consists of only four

VLSI Based Image Scaling Application for Raw Images By Using A Novel Video Stream Scaler Technique
free download
ABSTRACT In this paper a video stream scaler technique is used for image scaling application. The anticipated image scaling algorithm consists of Ram FIFO (RFIFO), RAM fill logic, Read control and blend control. The video stream scaler performs resizing of video

LOW POWER AND TEST DATA COMPRESSION IN VLSI TESTING USING NEW ENCODING SCHEME
free download
Abstract-Power dissipation during test is a significant problem as the size and complexity of systems-on-chip (SOCs) continue to grow. During scan shifting, more transitions occur in the flip-flops compared to what occurs during normal functional operation. This problem is

A VLSI Architecture for H. 264/AVC Variable Block Size Motion Estimation
free download
Abstract:In this paper, we propose an efficient VLSI architecture for variable block size motion estimation (VBSME) in H. 264/AVC to reduce the hardware cost and latency. The proposed architecture adopts four modes (8x8, 8x16, 16x8 and 16x16 modes) instead of

EE-382M VLSI�II OFF-CHIP DRIVERS/RECEIVER DESIGN SPRING 2015
free download
Send 1's and 0's chip to chip Can it be accomplished with simple inverters Transmit data at the highest frequency with minimal errors. Chip to chip transfers controlled by common

EE-382M VLSI�II FLIP-FLOPS Spring 2015
free download
Consequences � Increased flip-flop overhead Cycle time in 12 to 15 stage pipeline micro-Architectures is about ~22 FO4 delays FLOP overhead ~3 FO4 delay (DQ delay)

VLSI Implementation of 4X4 MIMO SC-FDMA Transceiver for Low Power Applications
free download
Abstract Single Carrier-Frequency Division Multiple Access (SC-FDMA) is an OFDMA alternative technology. SC-FDMA is the multiuser version of single carrier modulation with frequency domain equalization (SC/FDE). The main objective of SC-FDMA is to introduce

Reduced Clock Allocation Network for On-Chip Compression Format in VLSI Design
free download
Abstract: Now-a-days power dissipation is a vital subject in elevated presentation digital routes, because the amount of transistors has increased significantly. Several methods have been planned to decrease the switching activity. This paper presents a new examination

VLSI Routing for Advanced Technology
free download
VLSI 1 design is the process of creating construction plans for complex integrated circuits, commonly known as chips, which contain up to billions of transistors. Due to its high complexity, this process is divided into several steps, each of them comprising hard

VLSI DESIGN OF LMS ADAPTIVE FIR FILTER FOR HIGH SPEED APPLICATION
free download
Abstract:In this paper, we show an effective design for the implementation of a delayed least mean square adaptive filter and low power reconfigurable finite impulse response filter for achieving lower adaptationdelay and area-delay-power efficient implementation. we

VLSI IMPLEMENTATION OF NXN PARALLEL DECIMAL MULTIPLIER USING CSA
free download
Abstract: This paper introduces two novel architectures for parallel decimal multipliers. Our multipliers are based on a new algorithm for decimal carry save multi operand addition that uses a novel BC 4221 recoding for decimal digits. It significantly improves the area and

VLSI IMPLEMENTATION OF NOVEL ROUND KEYS GENERATION SCHEME FOR CRYPTOGRAPHY APPLICATIONS BY ERROR CONTROL ALGORITHM
free download
Abstract A novel implementation of code based cryptography (Cryptocoding) technique for multi-layer key distribution scheme is presented. VLSI chip is designed for storing information on generation of round keys. New algorithm is developed for reduced key size

VLSI Implementation of Neural Network
free download
Abstract:This paper proposes a novel approach for an optimal multi-objective optimization for VLSI implementation of Artificial Neural Network (ANN) which is area-power-speed efficient and has high degree of accuracy and dynamic range. A VLSI implementation of

Low-Complexity and Power Efficient VLSI Architecture for Turbo Decoder
free download
Abstract: Turbo codes consumes less power consumption and are powerful error correcting code, hence utilized in power constrained wireless communication applications. In this work, implementation of turbo decoder is considered to reduce the area, delay and power using

A Review on Memristor MOS Content Addressable Memory (MCAM) Design Using 22nm VLSITechnology
free download
Abstract-Large capacity content addressable memory (CAM) is a key element in wide variety of applications. A major challenge in realization of such systems is the complexities of scaling MOS transistors. Converges of different technologies, which are well-matched with

common bus principle is presented. Problems are studied which arise in the impLementation of this. concept by means of s-elf-synchronizing (aperiodic) VLSI.
free download
Implementation of the protocols of interconnection of entities at the bottom, physical layer of network architecture [l] has a number of peculiar features. In contrast to the general requirements to protocols of higher layers, it requires a more detailed study of certain

Implementation on Low Power Design Using Comparator for VLSI Design Circuit
free download
ABSTRACT: A 8-bit 5GS/s streak simple to-advanced converter (ADC) is composed and reproduced in a 0.18 CMOS innovation. Low-swing operation both in the simple and the computerized hardware brings about fast low power operation. The ADC disperses 30mW

High Throughput and Efficient VLSI Architecture for Speech Enhancement
free download
Abstract: This paper presents the implementation of high through-put hardware architecture for enhancing speech using spectral subtraction algorithm. Using the spectral subtraction algorithm the input speech is made free from the effect of background noise. This is done

AN ASYNCHRONOUS LOW POWER AND HIGH PERFORMANCE VLSI ARCHITECTURE FOR VITERBI DECODER IMPLEMENTED WITH QUASI DELAY
free download
Abstract: Convolutional codes are comprehensively used as Forward Error Correction (FEC) codes in digital communication systems. For decoding of convolutional codes at the receiver end, Viterbi decoder is often used to have high priority. This decoder meets the demand of

VLSI Implementation of Reversible Binary Adders in Quantum-Dot Cellular Automata
free download
ABSTRACT: Nowadays exponential advancement in reversible computation has lead to better fabrication and integration process. It has become very popular over the last few years since reversible logic circuits dramatically reduce energy loss. It consumes less power by

VLSI Implementation of Split-Radix Fast Fourier Transform: ASurvey
free download
Abstract: The purpose of a transform is to consider an algorithm or a fixed procedure or a set of rules or anyequation that changes one set of data to another set of data. The Fast Fourier Transform which is an efficient way to calculate the Discrete Fourier Transform produces

VLSI Implementation of Back Pr for Signal Proc
free download
Abstract-Mainly due to the rapid advances in integra technologies, large-scale systems design-in short, due to advent of VLSI Technology, the number of applications integrated circuits in high-performance comput telecommunications, and consumer electronics has

Disadvantages of High Power Integrated Circuits and Requirements of VLSI ICs with Low Power Consumption
free download
Abstract-In this paper, disadvantages of high power consumption and requirements of low power design are discussed. Today, all the portable devices need to be realized with low power architectures because of power consumption is a main consideration along with

NEW VLSI BWA ARCHITECTURE FOR FINDING THE FIRST W MAXIMUM/MINIMUM VALUES USING SORTING ALGORITHMS
free download
Abstract: Low density parity check (LDPC) codes have been extensively adopted in next- generation forward error correction applications because they achieve very good performance using the iterative decoding approach of the belief-propagation (BP). The

Neuromorphic VLSI Implementation of Analog Inner Hair Cell and Auditory Nerve IC Using Non-Invasive Technique
free download
Abstract:An analog inner hair cell and auditory nerve IC has been implemented using noninvasive techniques. Differential topology is used to remove the reverberations caused. A fully-differential current-mode architecture is used and the ability to correct channel mismatch is evaluated

Analysis of Different CMOS Full Adder Circuits Based on Various Parameters for Low Voltage VLSI Design
free download
Abstract:The demand for portable consumer electronics products is increasing at extremely high rate in recent years; therefore development of low-power VLSI circuits is essential. To achieve this objective a lot of innovative work has been done in this field, many innovative

Area�Efficient VLSI Implementation for Parallel Linear-Phase FIR digital Filters
free download
Abstract The fast finite-impulse response (FIR) algorithms (FFAs), able to create a new parallel FIR filter structures, which are beneficial to symmetric coefficients in terms of the hardware cost, under the condition that the number of taps is a multiple of 2 or 3. The

VLSI based Fuzzy Logic Static Voltage Regulation System
free download
Abstract: Fixed Voltage Regulator is an electronic device that regulates changeable voltages in a specific approach and protects the apparatus through practically eliminating any transients in the sharing set of connections. It is a good number appropriate for24-hour

ERROR DETECTION AND CORRECTION USING HAMMING CODE IN VLSI DESIGN UNDER NUCLEAR ENVIRONMENT
free download
Abstract: Errors occur in VLSI circuits which are deployed in nuclear power plants due to radiation, temperature changes etc. Reliability is a major concern in advanced electronic circuits. Errors caused for example by radiation become more common as technology

VLSI IMPLEMENTATION OF A PROGRAMMABLE LOW DROP-OUT VOLTAGE REGULATOR
free download
Abstract LDO voltage regulators compose a small subset of the power supply arena. Low- drop-out (LDO) voltage regulators are used in analog applications that generally require low noise and high accuracy power rails. Voltage regulators provide a constant voltage supply

Performance Analysis of Boostable Repeater in Different VLSI Interconnects and Applications
free download
Abstract: In the era of Nanometer technology variation of process aging of circuits cause vulnerable to establish circuits with the characteristics of adapting themselves and thereby a chance to compensate changes with the proposed one. Aging of circuitry and variations in

Fully Reused VLSI Architecture of FM0/Manchester Encoding for DSRC Applications by Using SOLS Technique
free download
(DSRC) is an emerging technique to push the intelligent transportation system into our daily life. The DSRC standards generally adopt FM0 and Manchester codes to reach dc-balance, enhancing the signal reliability. Nevertheless, the coding-diversity between the FM0 and

VLSI Designs for Low Power Applications
free download
Abstract:Low power has emerged as a principal theme in today's world of electronics industries. Power dissipation has become an important consideration as performance and area for VLSI Chip design. With shrinking technology reducing power consumption and

Performance Enhancement of VLSI Circuits using CNTFETs
free download
Abstract:: In the world of integrated circuits, CMOS has lost it's credential during scaling beyond 32nm. The main drawbacks of using CMOS transistors are high power consumption and high leakage current. Scaling causes severe Short Channel Effects (SCE) which are

VLSI DESIGN OF LOW ENERGY MODELING FOR NETWORK ON CHIP (NoC) APPLICATIONS
free download
ABSTRACT As technology trends advances workstation chips become increasingly parallel, an efficient communication substrate is decisive for meeting performance and energy targets, also as nanometre technology shrinks day by day work station chips migrated to

A Literature Review on Leakage and Power Reduction Techniques in CMOS VLSI Design
free download
Abstract: A rapid growth in semiconductor technology and increasing demand for portable devices powered up by battery has led the manufacturers to scale down the feature size, resulting reduced threshold voltage and thereby enabling integration of extremely

SAF ANALYSES OF ANALOG AND MIXED SIGNAL VLSI CIRCUIT: DIGITAL TO ANALOG CONVERTER
free download
ABSTRACT Digital to analog converter is widely used mixed-signal circuit. Testing of analog and mixed signals faces lots of challenges due to the wide range of circuits and unavailability of one appropriate fault model. SAF (stuck_at_Fault), Stuck_open and

A Greedy Iterative Algorithm and VLSI Implementation Strategy for Multiuser Detection
free download
Abstract:Multiuser detection (MUD) strategies have the poten-tial to significantly increase the capacity of wireless communications systems, but for these to be useful they must also be practical for implementation in VLSI circuits that cope with real world situations and

Design and comparative study of a fast N-bit divider and its VLSI Implementation
free download
Abstract:The design of a fast divider is an important issue in high-speed computing. Instead of finding the correct quotient digit, an estimated quotient digit is first speculated. The speculated quotient digit is used to simultaneously compute the two possible partial

VLSI implementation of modified Booth Algorithm
free download
Algorithm using 0.5 um CMOS technology. Booth Algorithm allows for smaller, faster multiplication circuits through encoding the signed numbers to 2's complement, which is also a standard technique used in chip design, and provides significant improvements by

Belief Propagation Decoder for LDPC Codes Based on VLSI Implementation
free download
ABSTRACT: Low density parity check (LDPC) codes are most widely used error correcting codes (ECC). Because of their popularity they are used in several applications such as the digital satellite broadcasting system (DVB-S2), Wireless Local Area Network (IEEE 802.11

Basic Introduction to VLSI Technology with Processing Steps for Bipolar Junction Transistors: A Review
free download
ABSTRACT In present electronics era, VLSI technology become is one of the most important and demandable theme. Behind this many reasons are presents include device portability, device size, large amount of features, cost, reliability, speed and many more. VLSI

AN AUTONOMOUS INTELLIGENT ROBOT VISION COMPUTATIONAL SENSORS IN VLSI
free download
ABSTRACT Traditional approaches for solving real-world problems using computer vision have depended heavily on CCD cameras and workstations. As the computation power of workstations doubles every 1.5 years, they are now better able to handle the large amount

Fully Reused VLSI Architecture of FM0/Manchester Encoding Technique for Memory Application
free download
Abstract: In this paper a fully reused VLSI architecture of FM0/Manchester encoding technique for memory application has been proposed. In this paper we are encoding the 1 bit data into 16 bit data and storing it into a memory of certain address location given by

An Efficient VLSI Architecture for FIR Filter Using Multi-Bit Flip-Flops
free download
Abstract Recent advances in mobile computing and multimedia applications demand high- performance and low power VLSI Digital Signal Processing (DSP) systems. One of the most widely used operations in DSP is Finite-impulse Response (FIR) filtering. In the existing

DSRC Applications in Intelligent Transportation System using SOLS Technique for fully reusedVLSI Architecture
free download
Abstract:The dedicated short-range communication (DSRC) is an emerging technique to push the intelligent transportation system into our daily life. The DSRC standards generally adopt FM0 and Manchester codes to reach dc-balance, enhancing the signal reliability.

VLSI Implementation of Reversible Watermarking Algorithm
free download
Abstract:This paper presents VLSI design approach and implementation of Lifting based Reversible Watermarking Algorithm. 5 by 3 Lifting based Discrete Wavelet Transform based image watermarking algorithm is proposed. It is attractive algorithm because of easier

Variable Body Biasing (VBB) Based VLSI Design Approach to Reduce Static Power
free download
Abstract:In CMOS integrated circuit design there is a swap among static power consumption and technology scaling. Recently, the power density has improved due to combination of higher clock speeds, greater functional integration, and smaller process

DESIGN OF MEMORY EFFICIENT VLSI ARCHITECTURE FOR REAL TIME MULTIMEDIA APPLICATION
free download
Abstract:On-chip memory hierarchy for a video contains the data memory and the context memory organizations for better optimization. Compressing the memory space is important aspect in VLSI, in order to reduce the power consumption, power dissipation and area.

Role of Low Power VLSI in Electronic and Digital Image Processing Practical Techniques Applications
free download
ABSTRACT In digital images when we used computer algorithms to perform image processing this term is generally called digital image processing. In the past, VLSI designers were mainly focused in area, performance, reliability and cost. But in today's world of

Circuit Optimization and Design Automation Techniques for Low Power CMOS VLSI Design: A Review
free download
Abstract Reports indicate that 40% or even higher percentage of the total power consumption is due to the leakage of transistors. This percentage will increase with technology scaling unless effective techniques are introduced to bring leakage under

A Feasible Approach to Design a Cmos Domino Circuit at Low Power VLSI Application Design
free download
Abstract: Dynamic logic style is used in high performance circuit design because of its fast speed and less transistors requirement as compared to CMOS logic style. But it is not widely accepted for all types of circuit implementations due to its less noise tolerance and charge

Single-ElectronTransistor Logic for High Reliability of Moore's Law and Low Power VLSI
free download
Abstract: The observation made in 1965 by Gordon Moore, co-founder of Intel, that the number of transistors that are embedded per square inch on integrated circuits had doubled every 18 months since the integrated circuit was invented. But as per latest trends in VLSI

Multiobjective VLSI Circuit Partitioning Using ACO for Optimal Solution
free download
Abstract:The acceleration of the product to market cycle of VLSI based technology products dictates continuously refining design and implementation methodologies. Circuit partitioning is a physical design methodology which divides a given circuit into segments abiding by

VLSI System Design Using High Level Synthesis Tools
free download
Page 1. Lab Experiment: VLSI System Design Using High Level Synthesis Tools By:

FPGA Design of Reconfigurable Binary Processor Using VLSI
free download
Abstract:Binary image processing is a powerful tool in many image and video applications. In this paper we proposed efficient hardware architecture of Binary image processor for low power applications and also propose an Efficient Majority Logic Fault Detection algorithm

Dual AGC Model Implementation of the Inner Hair Cell and Auditory Nerve IC in NeuromorphicVLSI
free download
ABSTRACT-An analog inner hair cell and auditory nerve has been implemented for the persons with hearing disabilities. The designed circuit uses fully balanced circuits to reduce the mismatch of the signals that enters through the hearing aid. Ultra low power

Analog VLSI Implementation of Neural Network Architecture
free download
Abstract: Artificial intelligence is realized using artificial neurons. In the proposed design, we are using Artificial neural network to demonstrate the way in which the biological system processes in analog domain. The analog components like Gilbert Cell Multiplier (GCM),

Design of High Speed VLSI Architecture for 1-D Discrete Wavelet Transform
free download
Abstract: The work presents an implementation of discrete wavelet transform (DWT) using systolic array architecture in VLSI. The architecture consists of filter unit, storage unit and control unit. This performs calculations of low pass and high pass coefficients by using

VLSI IMPLEMENTATION OF IEEE754-2008 STANDARD FOR FINANCIAL TRANSACTIONS
free download
ABSTRACT Financial transactions are specified in decimal arithmetic. Until the introduction of IEEE 754-2008, specialized software hardware routines were used to perform these transactions but it incurred a penalty on performance. There is a need for accurate

Carbon Nanotube Prospects as On Chip VLSI Interconnects
free download
Abstract:within the confines of the topic we aim to acquaint the need, present trend and viability of the research in CNT as on-chip VLSI interconnects. The need to discuss the topic arises from the fact that the conventional materials used as interconnects like Cu/Al are

Efficient and high speed vlsi modelling of fm0/manchester encoding using sols technique and clock gating technique for dedicated short range communication
free download
Abstract-To promote intelligent and smart transportation services into our daily life the dedicated short range communication is an advanced technique. Data encoding techniques like FM0 and Manchester encoders are used to promote communication among vehicles.

A Low-Power VLSI Technique for Portable Electronic Devices
free download
Abstract: In portable electronic devices that operate on battery power, it is essential to have power saving techniques to increase the operating time as they are energy constrained. This paper presents a novel power saving technique supported by two design models for

VLSI IMPLEMENTATION OF LOW-POWER ADAPTIVE FIR FILTER USING DISTRIBUTED ARITHMETIC
free download
Abstract:The main objective is to design DA based adaptive filter in order to decreasing the logic complexity. Throughput is increasedby using parallel Look Up Table (LUT) update and concurrent implementation of filtering and weight-update operations. DA uses

VLSI HARDWARE MODELING OF DYNAMIC RNS STRUCTURE FOR HIGHEND COMPUTATIONS
free download
ABSTRACT This paper presents a dynamic structure for binary-to-residue number system (RNS) conversion modulo {2n�k} using macro structures. This structure is based only on adders and constant multipliers. This concise work is motivated by the existing {2n�k}

VLSI IMPLEMENTATION OF 2-D FDWT IMAGE SCALING PROCESSOR
free download
ABSTRACT: The block diagram of the proposed scaling algorithm. It consists of a sharpening spatial filter, a clamp filter, and a bilinear interpolation. The sharpening spatial and clamp filters serve as pre filters to reduce blurring and aliasing artifacts produced by

VLSI IMPLEMENTATION OF HIGH PERFORMANCE DISTRIBUTED ARITHMETIC (DA) BASED ADAPTIVE FILTER WITH FAST CONVERGENCE FACTOR
free download
Abstract: The key objective of this paper is to provide an idea for VLSI Implementation of RLS algorithm for noise cancellation with real time analog inputs. In this paper, we present an efficient architecture for the implementation of distributed arithmetic based multiplier

VLSI Based Adaptive Modulation and Adaptive OFDM
free download
Abstract:-In this paper, adaptive modulation technique is presented for Orthogonal Frequency Division Multiplexing (OFDM) based wireless communication system. The design of adaptive modulation is done through Very Large Scale Integration (VLSI) System

Space Compaction and Use of Minimal Logic Gate in VLSI Test Circuit Design by Uniquely Developed Algorithm Based on Graph Theoretical Approach
free download
Abstract:The design and implementation of space-efficient hardware for built-in self-testing circuit is very important step for synthesizing very large scale integration circuits. This research presents a new technique for merging output test vectors. The proposed

Graphene Based Planar VLSI Interconnects
free download
Abstract-Recently graphene nano-ribbon is a strong candidate for future VLSI interconnects systems. Cu interconnect systems were used in past but as technology node decreases the above interconnect system faced many problems. The VLSI interconnects which are

Efficient Carry Select Adder Using VLSI Techniques With Advantages of Area, Delay And Power
free download
Abstract: Carry Select Adder (CSLA) is one of the high speed adders used in many computational systems to perform fast arithmetic operations. Due to the rapidly growing mobile industry not only the faster arithmetic unit but also less area and low power

VLSI Based 16 Bit ALU with Interfacing Circuit
free download
ABSTRACT: The ALU is one of the most important module in a CPU and it can be modified during most instruction executions. So more bit of operation of the ALU is important task. In this project 16 bit ALU is designed using VHDL and it is interfaced with RAM and ROM.

Review Paper on High Speed VLSI Architecture for AES Algorithm
free download
Abstract:Now a day's large number of internet and wireless communication users has led to an increasing demand of security measures and devices for protecting the user data transmitted over the unsecured network so that unauthorized persons cannot access it. As

A NOVEL DESIGN APPROACH TO INCREASE THE SPEED OF VLSI CIRCUITS IN MIXED-SIGNAL ENVIRONMENT
free download
ABSTRACT Currently the mixed signal circuits like A/D and D/A converters are being designed either by MATLAB, C C++ or VHDL-AMS. But, these languages do not give detailed information at the architecture level. Though VHDL-AMS (VHSIC Hardware

A Radix Based Parallel VLSI Architecture for Finding the First W Max/Mini Values
free download
Abstract: VLSI architectures for finding the first W (W 2) maximum (or minimum) values are required in the implementation of several applications such as non-binary LDPC decoders, K-best MIMO detectors and turbo product codes. In this work a parallel radixsort-based

High-Speed VLSI Circuit Simulator
free download
Abstract With the rapid increase in the processing speed and scaling in electronic feature sizes of integrated circuits below 45nm, the analysis and simulation of high speed interconnects has become a critical prerequisite for electrical engineers. Unlike in the past

Modified SA Algorithm for Wirelength Minimization in VLSI Circuits
free download
Abstract:In modern VLSI circuits, number of parameters viz, placement of components, dead space (un occupied space in the layout), wire length has to be minimized. The defined problems are non deterministic and NP hard optimization problem. Hence probabilistic (

VLSI Designing of High Speed Parallel Multiplier�Accumulator Based On Radix4 Booths Multiplier
free download
ABSTRACT In this paper, we proposed a new architecture of multiplier-and-accumulator (MAC) for high-speed arithmetic. By combining multiplication with accumulation and devising a hybrid type of ripple carry adder (RCA), the performance was improved. Since

IMAGE PROCESSING IN SECURE MANNER USING VLSI
free download
Abstract-Advanced Encryption Standard (AES) have been widely used in data encryption and decryption. The application of steganography in encrypted data is reported in a recent article. Any type of data can be practically hidden inside any image, without detectably

VLSI Implementation of Area Efficient Fast Parallel Fir Digital Filters Based On Fast Fir Algorithm
free download
Abstract: This paper proposes new parallel fir structures to reduce the hardware complexity of higher order Finite Impulse Response (FIR) filter with symmetric coefficients based on Fast FIR Algorithms (FFAs). The objective is to design an area-efficient Fast Parallel Finite-

VLSI POWER IN A NUTSHELL
free download
Electronic has been emerging its counterpart ever since the semiconductor was born. Now it has been developed throughout few decades and changed world into upside down. Electronic has evolved from vacuumed tubes to highly complex electronics designs

VLSI Implementation of Vedic Multiplier Using Urdhva�Tiryakbhyam Sutra in VHDL Environment: A Novelty
free download
Abstract: This paper anticipated the design of a novel Vedic Multiplier using the techniques of Ancient Indian Vedic Mathematics that have been modified to improve performance. A high speed processor depends greatly on the multiplier as it is one of the key hardware

Analog VLSI Implementation of Feed Forward Neural Network for Signal Processing
free download
Abstract: With the emergence of VLSI Technology in electronic industry, the numerous applications of integrated circuits in high-performance computing, consumer electronics, and telecommunications has been rising steadily, and at a very fast pace. Artificial intelligence

VLSI IMPLEMENTATION OF ALU USING QUATERNARY SIGNED DIGIT FOR SIGNED AND UNSIGNED NUMBERS
free download
Abstract: In this paper, we proposed a new number system for ALU. In binary number system carry is a major problem in arithmetical operation. We have to suffer O (n) carry propagation delay in n-bit binary operation. To overcome this problem signed digit is required for carry

VLSI Implementation of Fast Addition Using Quaternary Signed Digit Number System
free download
Abstract-With the binary number system, the speed of arithmetic operations are limited by formation and propagation of the carry. Using quaternary signed digit (QSD) number system both carry free addition and borrow free subtraction can be achieved. The QSD number

A Comparative Study of Various VLSI Architecture for Discrete Wavelet Transform
free download
Abstract:The wavelet transform has itself as a useful tool in the field of 1-dimensional and 2- dimensional signal compression systems. Due to the growing importance of this technique, there is an increasing need in many working groups for having a development

IMPLEMENTATION OF FM0 AND MANCHESTER ENCODING FOR DSRC APPLICATIONS IN VLSI
free download
Abstract:The dedicated short-range communication is a one-or two-way medium range communication that can be divided into two categories: automobile-toautomobile and automobile-to-roadside. The safety issue consists of blind-spot, forewarning about

The authors validate the need for employing the self-timing principle for matching of modules in VLSI circuitry. Formal models of specification and analysis of
free download
The current intensive development of microelectronic computer circuitry opens up prospects for creating systems on the basis of very large-scale integrated (VLSI) circuit-. redictions indicate that, by the end of the 198Ofs, manufacture of VLSI

A Novel Vlsi DHT Algorithm For A Highly Modular And Parallel Architecture
free download
Abstract: In the current scenario so many advanced techniques are finding a way as a substitute for complex DFT. One of such type of technique is Discrete Hartley Transform. The requirement of only real arithmetic computations for the proposed technique makes it

To Develop and Implement Low Power, High Speed VLSI for Processing Signals using Multirate Techniques
free download
Abstract:-Multirate technique is necessary for systems with different input and output sampling rates. Recent advances in mobile computing and communication applications demand low power and high speed VLSI DSP systems [4]. This Paper presents Multirate

An Efficient Design of Optimized Low Power Dual Mode Logic Circuits Using VLSI Technology
free download
Abstract-This project represents a dual mode logic circuit for low power applications. Now a day's power consumption is the major role in chip design. If the area ofthe chip is reduced, the power consumption and the delays are increased due tosome effects like, cross talk,

Design of Novel Domino Circuits For High Performance And Energy Efficient VLSI Design
free download
ABSTRACT: In this work, a new domino circuit is proposed, which has a lower leakage and higher noise immunity without dramatic speed degradation for wide fan-in gates. The technique which is utilized in this work is based on comparison of mirrored current of the

Optimization of power and area using majority voter based fault tolerant VLSI circuits
free download
Abstract:This paper proposes a new voter circuit for tolerating stuck-at-faults in digital circuits. We consider in this paper single stuck-at type faults, occurring at a gate input. A stuck-at-fault may adversely affect on the functionality of the user implemented design. A

Comparative Analysis of CMOS Low Noise Amplifiers in 45 nm VLSI technology
free download
Abstract-The paper represents simulation and design of Low Noise Amplifier in a 45nm CMOS technology at 77 GHz frequency. Here we have proposed a comparative analysis of single ended and current reuse LNA. The LNA function is used to amplify signals without

VLSI Circuits and Systems Letter
free download
Abstract This letter presents a novel improved delay estimation methodology during scheduling in high level synthesis (HLS) for application specific computing. In general during delay estimation from scheduling during HLS, only functional unit delay is

VLSI IMPLEMENTATION OF ENCODING TECHNIQUEFOR EFFICIENT HARDWARE UTILIZATION IN DSRCAPPLICATIONS
free download
Abstract:The dedicated short-range communication (DSRC) is an emerging technique to push the intelligent transportation system into our daily life. The DSRC standards generally adopt FM0 and Manchester codes to reach dc balance, enhancing the signal

AVOID SYNCHRONIZATION LATENCY USING VLSI IMPLEMENTATION
free download
ABSTRACT The phenomenon of metastability is inherent in clocked digital logic. Many techniques have been presented for minimizing metastability, both for crossing clock domains, and for handling asynchronous inputs. Flip-flops are among these systems and

Overview of Testing Power Switches in VLSI Circuits
free download
Abstract:This paper presents a comparative discover of power switches. Power switches are increasingly becoming dominant leakage power reduction technique. Hence, fast and efficient DFT resolution for examination and diagnosis of power switches is far demanded

VLSI Design of Data Processing Architecture for Wireless Sensor Nodes
free download
Abstract:Sensor network processors introduce an unprecedented level of compact and portable computing. Sensor processors have a wide variety of applications in medical monitoring, environmental sensing, industrial inspection, and military surveillance.

Low Power VLSI Implementation of Adaptive Noise Canceller Based on Least Mean Square Algorithm
free download
Abstract: This paper presents VLSI implementation of adaptive noise canceller based on least mean square algorithm. First, the adaptive parameters are obtained by simulating noise canceller on MATLAB. Simulink model of adaptive noise canceller was developed

Sub word Partitioning and Signal Value based Clock gating Scheme for Low Power VLSIApplications
free download
Abstract The low power optimization techniques are very crucial for next generation wireless communication and battery powered signal processing applications. Several low power optimization techniques at circuit level and device level were implemented in past two

Realization of VLSI Architecture of Defuzzifier Unit
free download
Abstract-Fuzzy system used in control system, data mining, expert system. The fuzzy logic control system consist of a fuzzifier, fuzzy rule base, inference engine and defuzzifier. fuzzification and defuzzification are the two important process in the fuzzy logic control

VLSI Architecture of Centre of Gravity Based Defuzzifier Unit
free download
Abstract:In fuzzy control systems, fuzzification and defuzzification are two important procedures. Defuzzification is an important part in the implementation of a fuzzy system. The fuzzy data obtained from the fuzzification process is not suitable for real time applications,

Review on Low Power Design Using Comparator for VLSI Design Circuit
free download
ABSTRACT: The zone of low power and rapid planning of simple to-advanced converters (Adcs) has been a testing issue in the course of the most recent decade. The rate improvement of serial connections and the rising correspondence advances has slanted

A NEW VLSI ARCHITECTURE FOR 32/33/47/48 MULTIBAND FLEXIBLE DIVIDER USING 2/34/5 PRESCALER
free download
Abstract:This project is highly useful and recommended for communication applications like Bluetooth, Zigbee. WLAN frequency synthesizers are proposed based on pulseswallow topology and the designed is modeled using Verilog simulated using Modelsim and

Efficient VLSI Implementation Based On Constructive Neural Network Algorithms
free download
Abstract: C-Mantec is a new neural network algorithm that adds competition between neurons with thermal perceptron learning rule. The neuron learning is ruled by the thermal perceptron rule that guarantees the stability of the learnt information while the architecture

VLSI Design of Power Efficient Reversible LFSR Using Pseudo Reed-Muller Expressions
free download
Abstract:Power dissipation is considered as one of the most important factors while designing a circuit. Reversible logic has become a promising technology in low power design. It is because reversible logic utilizes only very less power, thereby leading to less

TECHNIQUE FOR DETECTING MEMORY ERRORS IN JPEG 2000 USING VLSI TECHNOLOGY
free download
Abstract: This paper presents novel techniques to mitigate the effects of SRAM memory failures caused by low voltage operation in JPEG2000 implementations. We investigate error control coding schemes; specifically single error correction double error detection

DESIGN AND IMPLEMENTATION OF INTEGER DCT ARCHITECTURES FOR HEVC IN VLSITECHNOLOGY
free download
ABSTRACT: High Efficiency Video Coding (HEVC) inverse transform for residual coding uses 2-D 4x4 to 32x32 transforms with higher precision as compared to H. 264/AVC's 4x4 and 8x8 transforms resulting in an increased hardware complexity. In this paper, an

VLSI Implementation of Double-Base Scalar Multiplication on a Twisted Edwards Curve with an Efficiently Computable Endomorphism
free download
Abstract. The verification of an ECDSA signature requires a doublebase scalar multiplication, an operation of the form Q where G is a generator of a large elliptic curve group of prime order n, Q is an arbitrary element of said group, and k, l are two





FREE IEEE PAPERS

FULL LISTNEWSEARCH

vlsi and low power vlsi research paper 2014




Extraction of VLSI Multiconductor Transmission Line Parameters by Complementarity.
free download
(MTL) equations is of fundamental importance for the design and signal integrity verification of interconnections in VLSI systems. It is well established that the critical issue is the efficient and accurate electrical characterization of the MTLs through the determination of their per-

Development of Low Temperature Oxidation Process Using Ozone For VlSI
free download
ABSTRACT With decreasing size of MOS transistor the thickness of gate oxide (SiO2) is reaching in regime where it is just 2-3 atomic layers thick about 1 to 1.5 nm thick because of thin oxide layers there is direct tunnelling of charge carriers through gate oxide, and the

Microfluidic Biochips: Connecting VLSI and Embedded Systems to the Life Sciences
free download
Abstract The tutorial offers attendees an opportunity to bridge the semiconductor ICs/system industry with the biomedical and pharmaceutical industries. The tutorial will first describe emerging applications in biology and biochemistry that can benefit from advances in

Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm.
free download
The Gaussian surface for full-net extraction ? Fast but inaccurate, able to extract full-chip Has tunable accuracy and is scalable to large cases. M. Kamon and R. Iverson, High-accuracy parasitic extraction, in EDA for IC Implementation, Circuit Design,

Energy Efficient Advanced Low Power CMOS Design to reduce power consumption in Deep Submicron Technologies in CMOS Circuit for VLSI Design
free download
ABSTRACT Low power has emerged as a principal theme in today's electronic industry. Energy efficiency is one of the most critical features of modern electronic systems designed for high speed and portable applications. Reduction of power consumption makes a device more

A novel reduced-complexity soft-input soft-output MMSE MIMO detector: Algorithm and efficientVLSI architecture
free download
ABSTRACT A novel reduced-complexity soft-input soft-output minimum mean square error detection algorithm for MIMO systems together with an area-throughput efficient VLSI architecture is described. A detailed comparison to related work is presented. The

Advanced Symbolic Analysis for VLSI Systems
free download
Symbolic analysis is an intriguing topic for VLSI design. Traditional symbolic analysis is typically concerned with deriving exact or approximate analytic expressions of analog circuit performance in terms of circuit parameters. Such symbolic expressions give clear

AN OPTIMAL FLIP FLOP DESIGN FOR VLSI POWER MINIMIZATION.
free download
Abstract The power consumption is critically important in modern VLSI circuits especially for low-power applications. Optimization of power at the logic level is one of the most important tasks to minimize the power. Among logic components, latches and flip-flops are

VLSI Architecture for Implementing Kaiser Bessel Window Function Using Expanded Hyperbolic CORDIC Algorithm
free download
ABSTRACT Windowing techniques have been widely used for preprocessing of samples before fast Fourier transform (FFT) in real time spectral analysis to minimize spectral leakage and picket fence effect. Among all popular window functions, Kaiser-Bessel window is an

Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectors
free download
ABSTRACT A computational complexity analysis of matrix inversion used in soft-input soft- output minimum mean square error (MMSE) MIMO detectors and a comprehensive literature comparison of corresponding VLSI implementations are presented. They indicate that the

Phase Locked Loop using VLSI Technology For Wireless Communication
free download
ABSTRACT Literature survey of Phase Locked Loop reflects that many researchers have applied different techniques like digital and analog simulation by applying mathematical/logical relations to design the Phase Locked Loop (PLL). Researchers have

Evaluation and Comparison of Single-Wall Carbon Nanotubes and Copper as VLSIInterconnect
free download
ABSTRACT The work in this paper addresses the capabilities and performance of single wall carbon nanotube (SWCNT) bundles as interconnects for applications in VLSI circuits. The carbon nanotube (CNT) bundles have potential to provide an alternate solution for the

A Two-bit Bus-Invert Coding Scheme With a Mid-level State Bus-Line for Low Power VLSIDesign
free download
ABSTRACT A new bus-invert coding circuit, called Two-bit Bus-Invert Coding (TBIC) is presented. TBIC partitions a bus into a set of two-bit sub-buses, and applies the bus-invert (BI) algorithm to each subbus. Unlike ordinary BI circuits using invert-lines, TBIC does not

Predict VLSI Circuit Reliability Risks Using Neural Network
free download
Abstract This paper describes the challenges faced in predicting the reliability of very large scale integration (VLSI) circuits. Currently, lots of trial-and-errors are still needed for the parameters selected to develop a neural network prediction model, whose result is with a

Trace-Based Post-Silicon Validation for VLSI Circuits
free download
This book includes, but is not limited to, the research work on post-silicon validation during the author Xiao Liu's Ph. D. study. Post-silicon validation is an emerging research field, and limited publications are available to summarize the state of the art on it. Interested readers

Power reduction in digital VLSI circuits
free download
Abstract The increased use of Portable electronics devices such as cellular phones, notebook and computers has made power dissipation an important design metric in modern microelectronics. Portable devices that operate using a battery have limited energy

Analysis of VLSI Based Induction Motor Speed Control using Auto Tune PID Controller
free download
ABSTRACT This is the review work for VLSI based Induction Motor Speed Control using Auto Tune PID controller. The present paper suggested stand alone control device for industrial induction motor speed control. PID tuning is proposed using successive approximation

A REPORT ON LOW POWER VLSI CURCUIT DESIGN
free download
Abstract We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. The most important factor in any system design is power. Low power became a major factor where power dissipation has become as important

System Design for Encoding and Decoding to Minimize the Crosstalk in VLSI Circuits
free download
ABSTRACT In the growing up world many technologies are growing faster and faster as they are becoming smaller and smaller, one such is the very large scale integrated design-VLSI. Many challenges are faced in VLSI, one of them is the crosstalk occurrence. Global buses

Optimization Techniques for Low Power VLSI Circuits
free download
ABSTRACT Power dissipation has emerged as an important design parameter in the design of microelectronic circuits, especially in portable computing and personal communication applications. In this paper, we survey state-of-the-art optimization methods that target low

VLSI Based 1-D ICT Processor for Image Coding
free download
ABSTRACT The Integer Cosine Transform (ICT) presents a performance close to Discrete Cosine Transform (DCT) with a reduced computational complexity. The ICT kernel is integer- based, so computation only requires adding and shifting operations. This paper presents

CMOS VLSI Implementation of Adders with Low Leakage Power
free download
ABSTRACT Due to the semiconductor technology revolution, portable consumer electronic products are made with more features. The power dissipation factor is important since those systems are built with plenty of transistors. As the sizes of the transistors shrink and the

Implementation of BDDs by Various Techniques in Low Power VLSI Design.
free download
ABSTRACT Power has become an important design parameter in today's ultra low submicron digital designs as found. The impact of the increase in power is multi-discipline to researchers ranging from power supply design, power converters, voltage regulators

BACKTRACK INPUT VECTOR ALGORITHM FOR LEAKAGE REDUCTION IN CMOS VLSIDIGITAL CIRCUIT DESIGN
free download
Abstract A new algorithm based on Input Vector Control (IVC) technique is proposed, which shifts logic gate of a circuit to its minimum leakage state, when device goes into its idle state. Leakage current in CMOS VLSI circuit has become a major constrain in a battery

A Review of Nanoscale Channel and Gate Engineered FINFETs for VLSI Mixed Signal Applications Using Zirconium-di-Oxide Dielectrics
free download
Abstract In the past, most of the research and development efforts in the area of CMOS and IC's are oriented towards reducing the power and increasing the gain of the circuits. While focusing the attention on low power and high gain in the device, the materials of the

CMOS VLSI Design of Low Power Comparator Logic Circuits
free download
Abstract As the demand of portable consumer electronic products increases rapidly and the chip size decreases, designers are facing many challenges towards the circuit area and power. Decades ago, engineers worried about the speed of operation of the system. They

VLSI IMPLEMENTATION OF RC4 STREAM CIPHER USING HARDWARE PIPELINING
free download
Scale Integrated (VLSI) design of high performance Ron's Code 4 (RC4) stream cipher using hardware pipelining to achieve high throughput, high speed and optimum area without compromising the cryptographic security. We have achieved the high throughput

An Efficient VLSI Architecture for Removal of Impulse Noise in Images
free download
Abstract Images are often corrupted by impulse noise in the procedures of image acquisition and transmission. In this paper, an efficient VLSI implementation of Adaptive Rank Order Filter (AROF) for removal of impulse noise is proposed. The algorithm

Wireless Cellular Communication Using 100 Nanometers Spintronics Device Based VLSI
free download
ABSTRACT Rapid progress in the miniaturization of the semiconductor electronic devices leads towards chip features smaller than 100 nanometers in size. This revolution offers opportunities for developing a new generation of device incorporating standard

A Novel VLSI Architecture of a Weighted Average Method based Defuzzifier Unit
free download
ABSTRACT In fuzzy control systems, fuzzification and defuzzification are two important procedures. Defuzzification plays an important part in the implementation of a fuzzy system, since the fuzzy data is not suitable for real time applications; it needs to be converted into

A Study on Various Data Mining Algorithms Pertaining to VLSI Cell Partitioning
free download
Abstract VLSI Cell Partitioning plays a substantial part in VLSI physical design. The task of designing integrated circuits is multifaceted, as modern circuits have a very huge number of modules. It is very much essential to split the circuit into a smaller and meeker logic blocks

Analysis of Utility Theory on VLSI Cell Placement
free download
ABSTRACT This paper focuses on the employment of utility theory for decision making under risk and uncertainty. Further, we have also investigated the efficiency of the three types of utility curves namely Conservation Man, Average player and the Gambler. The utility

Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems
free download
MC Bhuvaneswari 2015 Springer This book describes how evolutionary algorithms (EA) such as genetic algorithms (GA) and particle swarm optimization (PSO) can be used for solving multiobjective optimization problems in the area of embedded and VLSI systems design. This book is written primarily

Impact of process variations on soft error sensitivity of 32-nm VLSI circuits in near-threshold region
free download
As technology scales, power consumption has become a major concern in circuit design [HAP+ 05]. In the early history of CMOS, the scaling of the supply voltage was in accordance with the scaling of the transistors in order to maintain constant electric fields in the device.

Simulation Analysis and Performance of the Reactive Components of MOS Structure Towards Small Size Vlsi Circuits
free download
ABSTRACT In this research thin film layers have been prepared at alternate layers of resistive and dielectric deposited on appropriate substrates to form four–terminal RY-NR network. If the gate of the MOS structures deposited as a strip of resistor film like NiCr, the MOS

Design and Implementation of Neural Network Based circuits for VLSI testing
free download
ABSTRACT Artificial Neural Network (ANN) plays a vital role in biologically inspired microcircuits, which is also known as the new trend of Very Large Scale Integration (VLSI) involvement of silicon based neurons. This paper proposes a new design methodology in

VLSI Implementation and Performance Evaluation of Universal Modulator using CORDIC Algorithm for Digital Communication Applications
free download
ABSTRACT Today's communication systems and software radio based applications required fully digital Antennas, consisting of fully programmable circuit with digital modulators and demodulators. A basic communication system's modulator modulates the amplitude,

Test Data Compression Architecture for Lowpower VLSI Testing
free download
integration capability of semiconductor technology, today's large integrated circuits requires an increasing amount of data for testing which increases test time and elevated

Analysis of Clustering Techniques in VLSI Cell Partitioning
free download
Abstract Circuit partitioning plays a dominant role in VLSI physical design of chips. In this paper the newly proposed rank based k-medoid clustering algorithm is discussed, in order to partition the combinational circuit based on their interconnection distance among cell

A VLSI Architecture for H. 264/AVC Variable Block Size Motion Estimation
free download
ABSTRACT In this paper, we propose an efficient VLSI architecture for variable block size motion estimation (VBSME) in H. 264/AVC to reduce the hardware cost and latency. The proposed architecture adopts four modes (8x8, 8x16, 16x8 and 16x16 modes) instead of

Parallel Architecture for the VLSI Implementation
free download
plays a very important role in data communication. Various codes such as convolutional and block codes are available for the purpose of error detection and correction. Among the

CROSSTALK NOISE REDUCTION USING WIRE SPACING IN VLSI RC GLOBAL INTERCONNECTS
free download
This paper presents a closed form 2p crosstalk noise model for on-chip VLSI RC interconnects. It considers a case when unit step input is applied to the aggressor which is adjacent to the victim net and producing crosstalk noise effect over it. In the next section

Graphene and its Dopants used as a Transistor in VLSI Circuits
free download
ABSTRACT Graphene, a sheet of carbon atoms arrayed in a honeycomb pattern, could be a better semiconductor than silicon. Due to many such properties graphene has been under study as a alternative substance used, rather then graphite and silicon in transistors. But

Cryptography Based On Hash Function BLAKE 32 in VLSI
free download
ABSTRACT An important commodity in the world of Electronic Communication is information. The protection of authenticity and integrity of information is necessary to achieve a secure communication between communicating parties. Electronic security is becoming

System Design for Encoding and Decoding to Minimize the Crosstalk in Vlsi Circuits
free download
technologies are growing faster and faster as they are becoming smaller and smaller, one such is the very large scale integrated design-VLSI. Many challenges are faced in VLSI,

Vlsi Implementation of Evolvable Pid Controller
free download
PID controller span from small industry to high technology industry. Due to PID controllers' widespread use in industry, tuning procedures for them are always a topic of interest. In

LOW POWER VLSI COMPRESSORS FOR BIOMEDICAL APPLICATIONS.
free download
ABSTRACT We present a new design for a 1-bit full adder featuring hybrid-CMOS design style. Our approach achieves low-energy operations in 90nm technology. Hybrid-CMOS design style makes use of various CMOS logic style circuits to build new full adders with

VLSI ARCHITECTURE FOR IMAGE COMPRESSION THROUGH ADDER MINIMIZATION TECHNIQUE AT DCT STRUCTURE.
free download
ABSTRACT Data compression plays a vital role in multimedia devices to present the information in a succinct frame. Initially, the DCT structure is used for Image compression, which has lesser complexity and area efficient. Similarly, 2D DCT also has provided reasonable data

Logic Complexity Reduction and VLSI Architecture for Image Compression Using Conventional Adders
free download
ABSTRACT In last few decades, portable multimedia devices are attracts more consumers all the time with their features of low power and large digital storage. Most of the people are extending their requirements which may give little difficulty to designer to handle the

Vlsi Based Accident Information and Car Security System
free download
ABSTRACT VLSI based Accident information and car security system deals with the concern of saving the victim, who gets trapped in accident and also about the car security. Accident of the car is detected using pressor sensors which are fixed in car. Accident information to

Effective Clustering Algorithms for VLSI Circuit Partitioning Problems
free download
Abstract In this article, the effective circuit partitioning techniques are employed by using the clustering algorithms. The technique uses the circuit netlist in order to cluster the circuit in partitioning steps and it also minimizes the interconnection distance with the required

VLSI decoding architectures: flexibility, robustness and performance
free download
Stemming from previous studies on flexible LDPC decoders, this thesis work has been mainly focused on the development of flexible turbo and LDPC decoder designs, and on the narrowing of the power, area and speed gap they might present with respect to dedicated

VLSI ARCHITECTURE OF MIMO DETECTOR USING FIXED COMPLEXITY SPHERE DECODING
free download
Abstract Fixed Sphere Decoding is a near optimum tree search detection technique for the spatial multiplexing scheme. The algorithm performs a fixed number of operations to detect the signal independent of the noise level and channel conditions. In this paper, a

Lightweight VLSI Design of Hybrid Hummingbird Cryptographic Algorithm
free download
ABSTRACT Due to drastic increase in e-commerce, there is need for real time implementation of light weight cryptographic algorithms to be used in low cost smart devices such as RFID tags, smart cards, wireless sensor network, PDA's etc. Hummingbird is a

WIDEBAND ANALOG VLSI IMPLEMENTATION OF ARTIFICIAL NEURAL NETWORKS
free download
This paper presents an analog VLSL circuit for implementation of Artificial Neural Networks (ANNs). The building blocks of the proposed circuit include Differential voltage current controlled source (DVCCS), Super MOSFET and Differential voltage controlled voltage

VLSI Implementation of Parallel Prefix Subtractor using Modified 2's Complement Technique and BIST Verification using LFSR Technique
free download
ABSTRACT Parallel prefix Subtractor is the most flexible and widely used for binary addition/subtraction. Parallel Prefix Subtractor is best suited for VLSI implementation. No any special parallel prefix Subtractor structures have been proposed over the past years

VLSI Detailed Routing
free download
R Piersiak rafalku.com ABSTRACT Detailed Routing takes the channels and switchboxes created by the global routing and wires the nets to the terminals. It is a methodic approach, efficiently wiring each region one-byone, ensuring that all previous routed regions are unaffected by the current

An Efficient VLSI Computation Reduction Scheme in H. 264/AVC Motion Estimation
free download
ABSTRACT The variable block sizes motion estimation in H. 264 is key technique to remove inter-frame redundancy. This technique not only requires huge memory bandwidth but also its computation complexity is higher. Therefore, this paper proposes one efficient sub-pixel

SENSITIVITY ANALYSIS OF VLSI INTERCONNECT OUTPUT SIGNAL
free download
ABSTRACT Interconnect parameters play an important role in signal propagation in VLSI systems. In the paper we present the sensitivity analysis to parameters of typical on-chip interconnects for the step and ramp response. In the paper we show also the sensitivity to

VLSI Implementation and Analysis of Parallel Adders for Low Power Applications
free download
ABSTRACT Carry select adder (CSLA) is known to be the fastest adder among the conventional adder structures. Due to the rapidly growing mobile industry not only the faster arithmetic unit but also less area and low power arithmetic units are needed. The modified

A VLSI Implementation of Fast Addition Using an Efficient CSLAs Architecture
free download
ABSTRACT Carry Select Adder (CSLA) is a fast adder used in dataprocessing processors for performing fast arithmetic functions. From the structure of the CSLA, the scope is reducing the area of CSLA based on the efficient gate-level modification. However, the Regular

EFFICIENT VLSI ARCHITECTURE USING DIT-FFT RADIX-2 AND SPLIT RADIX FFT ALGORITHM
free download
ABSTRACT FFT has wide use in communication for processing the data being exchanged. Hence it is important to develop high-performance FFT architecture to meet the requirements of real time and low cost in many different systems. Efficient VLSI architecture based on

E3 239 Advanced VLSI Circuits High-Performance SRAM Design
free download


Concepts of Primitive Polynomial and Galois Field in Designing More Randomize PN Sequence Generators for Maximum Fault Coverage in Modern VLSI
free download
ABSTRACT This paper deals with the vital role of primitive polynomials for designing PN sequence generators. The standard LFSR (linear feedback shift register) used for pattern generation may give repetitive patterns. Which are in certain cases is not efficient for

Design and Implementation of Low Power High Speed VLSI DSP System for Multirate Polyphase Interpolator
free download
Multirate filtering to provide signal processing in wireless communication system. There are many applications in which sampling rate must be changed. Recent advances in mobile computing and communication applications demand low power and high speed VLSI DSP

SIMULTANEOUS ROUTING AND BUFFER INSERTION ALGORITHM FOR MINIMIZING INTERCONNECT DELAY IN VLSI LAYOUT DESIGN
free download
In deep submicron fabrication technology, transistors can now switch much faster, but wire resistances are now larger, and delay due to wires can exceed gate delay. Consequently, the interconnect delay is the dominant factor in the construction of wire routing in very

Design of Low Cost Image Scaling Processor Using Single Line Buffer Based on VLSIArchitecture
free download
ABSTRACT Image scaling is the process of resizing a digital image. It is one of the most important methods used in various applications such as sharpening of an image, image zooming, preserving edge structures in an image and so on. This paper proposes an

RESOURCEFUL FAST DHT ALGORITHM FOR VLSI IMPLEMENTATION BY SPLIT RADIX ALGORITHM
free download
ABSTRACT A new very large scale integration (VLSI) algorithmic rule for a 2N-length discrete hartley transform (DHT) that may be expeditiously enforced on a extremely standard and parallel VLSI design having a regular structure is given. The DHT algorithmic rule may be

VLSI Design of a Parallel MCMC-based MIMO Detector with Multiplier-Free Gibbs Samplers
free download
ABSTRACT Little consideration has so far been dedicated to the investigation of the implementation complexity of stochastic detectors for multi-antenna (MIMO) systems although they promise communications performance close to max-log detection for certain

TEST DATA COMPRESSION FOR LOW POWER TESTING OF VLSI CIRCUITS
free download
VLSI circuits are Test data volume and excessive test power. Among the many different compression coding schemes proposed till now, the CCSDS (Consultative Committee for Space Data Systems) lossless data compression scheme is one of the best. This paper

Vlsi Implementation Of Multiple Error Recovery In Tmr System Using Scan-Chain
free download
R Athira, VJA Karthick iosrjournals.org ABSTRACT Scan chain based multiple error recovery technique for a triple modular redundancy (TMR) system is used to detect and correct multiple errors in TMR systems. This method uses scan chain flip flops to detect and correct faulty modules. The errors are

An Extensive Review on Reversible Logic in VLSI
free download
ABSTRACT As of late reversible rationale has risen as a guaranteeing processing model for provisions in scattering less optical registering, low power CMOS, quantum figuring, and so on. In reversible circuits there exist a coordinated mapping between the inputs and the

Design and Analysis of CMOS Multiplier and EEAL Multiplier for Low Power VLSI Application
free download
Efficient Adiabatic Logic (EEAL) is proposed. In adiabatic logic, which dissipates less power than static CMOS logic, have been adiabatic circuits called energy efficient adiabatic logic introduced as a promising new approach in low power circuit design. The adiabatic

VLSI IMPLEMENTATION OF REAL TIME SPEECH RECOGNITION
free download
ABSTRACT The main aim of this project is to find the authenticationof user'svoice based on FPGA voice processing. Voice samples of authorized users will be trained and stored in VLSI hardware. Whenever the user speaks in front of microphone, the incoming voice

A Genetic Approach for Area Reduction in VLSI Layout
free download
Abstract Very-large-scale-integration (VLSI) is defined as a technology that allows the construction and interconnection of large numbers (millions) of transistors on a single integrated circuit. Integrated circuit is a collection of one or more gates fabricated on a

Low Power Multi Bit Flip Flops Design for VLSI Circuits
free download
ABSTRACT In this paper we present a power optimization technique to reduce clock power by using multi bit flip flop method. We have proposed the several techniques to overcome the problems of flip-flops replacement without timing and placement capacity constraints

AN EFFICIENT DESIGN OF VLSI ARCHITECTURE FOR FAULT DETECTION USING ORTHOGONAL LATIN SQUARES (OLS) CODES
free download
ABSTRACT Error correction codes (ECCs) are commonly used to protect memories against errors. Among ECCs, orthogonal latin squares (OLS) codes have gained renewed interest for memory protection due to their modularity and the simplicity of the decoding algorithm

VLSI DESIGN PROCESS FOR LOW POWER DESIGN METHODOLOGY USING RECONFIGURABLE FPGA
free download
Abstract Modern digital processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many applications, the growth of algorithmic complexity is already faster than the

Design of Storage Element for Low Power VLSI System
free download
ABSTRACT The storage elements are major power consuming component in VLSI system. The power reduction of storage element leads to reduction of global power consumption of VLSI system. In this paper, a Proposed single edge triggered (SET) and a Proposed double

VLSI Implementations of Compressive Image Acquisition Using Block Based Compression Algorithm
free download
ABSTRACT In this research paper consists of compressing the images within each pixel before the storage processes, hence the size of the memory gets reduced. This can be done by the proposed method namely block based compression algorithm which uses the differential

Comparative Analysis and Efficient VLSI Implementation of FIR Filter
free download
ABSTRACT In this paper, we present suitable design optimization for area-delay efficient implementation of finite impulse response (FIR) filter on Field Programmable Gate Array (FPGA). Architectural optimization done in MATLAB/Simulink environment, Hardware

Design of a Chip Area Efficient Low Drop-Out Voltage Regulator Using VLSI
free download
ABSTRACT The usage of the battery power devices in today's global village has become pervasive and indispensable in almost every walk of life. The thrust is towards reducing the number of battery cells, required to decrease cost and size, while minimizing quiescent

Design of Flip-Flops for High Performance VLSI Applications using Deep Submicron CMOS Technology
free download
ABSTRACT This paper enumerates low power, high speed design of SET, DET, TSPC and C2CMOS Flip-Flop. As these flip flop topologies have small area and low power consumption, they can be used in various applications like digital VLSI clocking system,

An Efficient Model for Design of 64 Bit Parallel Prefix VLSI Adder
free download
ABSTRACT Most of the manipulations are done based on the addition operations. To make the system effective and high speed a parallel adder plays an important role. With the help of a parallel prefix addition process we can achieve better results. In this paper a 64 bit parallel

EE 458 Analog VLSI
free download
Objective: The objective of the course is introduction of the fundamental concepts required for the creative and successful design of analog VLSI circuits. We will discuss basic transistor models and layout techniques for the design of analog integrated circuits. We

A Survey of VLSI Techniques for Power Optimization and Estimation of Optimization
free download
ABSTRACT With the advancement in compact, portable and high-density micro-electronic devices and systems, the power dissipated in very large scale integrated (VLSI) design circuits has become a critical concern. Accuracy and efficiency in power estimation

VLSI Realization of Area efficient FIR Filters
free download
ABSTRACT Arithmetic circuit Multiplication happens oftentimes in finite impulse response (FIR) filters, quick Fourier transforms, distinct trigonometric function transforms, convolution, and to avoid wasting vital temporal order consumption of a VLSI style. Here, we have a tendency

VLSI Implementation of Image Sensor for Spatial Filtering
free download
ABSTRACT A low-complexity adaptive scaling algorithm is proposed for the implementation of 2-D image scaling applications. a less complexity, less memory requirement, and high performance algorithm is proposed for Very Large Scale Integration implementation of an

An Efficient Distributed Tree Structure Modelling for VLSI circuits
free download
ABSTRACT In this paper a closed-form matrix rational model for the computation of finite ramp responses of distributed Resistance Inductance Capacitance (RLC) tree in VLSI circuits is presented. This model allows the numerical estimation of delay in distributed RLC tree.

A Greedy Iterative Algorithm and VLSI Implementation Strategy for Multiuser Detection
free download
ABSTRACT Multiuser detection (MUD) strategies have the poten-tial to significantly increase the capacity of wireless communications systems, but for these to be useful they must also be practical for implementation in VLSI circuits that cope with real world situations and

Polynomial Time Algorithms for the 3-Dimensional VLSI Routing in the Cube
free download
ABSTRACT. In previous works some polynomial time algorithms were presented for special cases of the 3-Dimensional VLSI Routing problem. Solutions were given to problems when all the terminals are either on a single face (SALP-Single Active Layer Problem) or on two

Optimization of Power Consumption in VLSI Circuit
free download
ABSTRACT Increasing speed and complexity of design gives a significant increase in power consumption in VLSI chips. Speed, power consumption and space are major issues in VLSI circuit. To meet these challenges there are certain design techniques which are used to

VLSI ARCHITECTURE OF AN AREA EFFICIENT IMAGE INTERPOLATION
free download
ABSTRACT Image interpolation is widely used in many image processing applications, such as digital camera, mobile phone, tablet and display devices. Image interpolation is a method of estimating the new data points within the range of discrete set of known data points.

VLSI Implementation of Variable Length Radix-2^ 5 for Cognitive Radio System
free download
ABSTRACT Cognitive Radio System (CRS) is a radio system which is aware of its operational and geographical environment, established policies, and its internal state. It is able to dynamically and autonomously adapt its operational parameters (sub carrier mapping)

A LOW POWER CMOS VOLTAGE MODE SRAM CELL FOR HIGH SPEED VLSI DESIGN
free download
ABSTRACT In this paper we propose a novel design of a low power static random access memory (SRAM) cell for high speed operations. The model adopts the voltage mode method for reducing the voltage swing during the write operation switching activity. Dynamic

VLSI Design and Performance Analysis of Different Full Adder Topologies at 0.25 Micrometer Technology Node
free download
ABSTRACT Full Adders are the most important components in digital design which not only perform addition operations, but also helpful in calculating several other functions such as subtraction, multiplication and division operations. Different types of adders are frequently

Modeling and Performance Analysis of Fuzzy Logic Controller Based Direct Torque Control ofVLSI Fed Three
free download
ABSTRACT This manuscript deals with fuzzy logic controller based Direct Torque Control (DTC) of three phase Induction Motor Drive using MATLAB and its toolbox SIMULINK. The Direct Torque Control of VSI fed Induction Motor is implemented with the help of

Issues of Optimization Techniques Targeting Low Power VLSI Circuits Design
free download
ABSTRACT In this paper the issues and state-of-the-art optimization methods that target low power dissipation in VLSI circuits Design. Optimizations at the circuit, logic, architectural and system levels are considered. The issues related to the Power dissipation in the design

Error Control Coding Architecture Using VLSI Implementation
free download
ABSTRACT Viterbi algorithm is widely used as a decoding technique for convolutional codes as well as a bit detection method in storage devices. The design space for VLSI implementation of Viterbi decoders is huge, involving choices of throughput, latency, area, and power.

Performance Analysis of VLSI Based Multilevel Inverter
free download
ABSTRACT This paper compares two different topologies of three phase inverter (ie diode clamped followed by cascade H-bridge) which includes five level and seven level inverters. The selection of topology and control techniques may vary according to power demands

VLSI and Algorithms for High-Speed Arithmetic
free download
ABSTRACT Area, latency, and process technology have a considerable impact on the cost- performance characteristics of floating point unit (FPU) design. Quantitative design metrics allow the FPU designer to make knowledgeable tradeoffs. Additionally, new algorithms

Design and implementation of a Multiplier-Less VLSI Architecture using Wavelet Filter Banks
free download
ABSTRACT Wavelet based signal processing incorporating Hilbert transform pair is proved to be more efficient by many authors. The multiplier-less VLSI based architecture of wavelet filter bank for biomedical applications is being proposed in this project. The proposed

Power-Efficient VLSI Implementation of A Feature Extraction Engine for Spike Sorting in Neural Recording and Signal Processing
free download
ABSTRACT This paper presents a power-efficient VLSI implementation of a feature extraction engine for the applications of real-time spike sorting. Traditional method like principal components analysis (PCA) works in a batch mode by diagonalizing the covariance matrix

Clock Tree Power Optimization of Three Dimensional VLSI System with Network
free download
ABSTRACT The proposed method is based on minimum-cost maximum-flow formulation to globally determine the tree topology, which maintains load balance and considers the wirelength between pulse generators and pulsed latches. Experimental results indicate

Comparative Analysis of Improved Domino Logic Based Techniques for VLSI Circuits
free download
S Kamde, S Badjate, P Hajare oaji.net ABSTRACT In modern VLSI design, Domino logic based design technique is widely used and in which power ignites the speed of circuit. The Dynamic (Domino) logic circuit are often favored in high performance designs because of the high speed and low area advantage.

System On Chip: Performance Analysis Of VLSI Based Networking System
free download
ABSTRACT The swell in the numeral of cores that can be incorporated on a distinct chip has forced the designer to use computer system concepts for design of System on Chip (SoC). The supplementary is of multiple protocols being used in the diligence at present. For

An Implementation of Image Compression using VLSI Architecture
free download
ABSTRACT This paper proposes a novel progressive image compression algorithm using the wavelet transform. Wavelets are effective in capturing directional information in images using a flexible set of basis functions and filtering process that are elongated and

Algorithm to color a Circuit Dual Hypergraph for VLSI Circuit
free download
ABSTRACT Line-of-sight graph is used to check the number of short circuit testing needed to test a printed circuit board. This paper presents a simple algorithm based on some assumptions to put color in a circuit dual hypergraph of a VLSI circuit. The structures of

VLSI Implementation of Orthogonal Space Time Block Coding (OSTBC) Based High Throughput Multiple Modes MIMO
free download
ABSTRACT Space Time Block Coding, in a wireless communication system transferring of data over Long Term Evolution downlink channel using multiple antennas at the transmitter and receiver ends which improve reliability of data transfer. In data transferring, data are first

VLSI Implementation of Multi Mode SoC FMA 128 bits
free download
MM Mahendra aijcse.com ABSTRACT The floating point arithmetic is complex and its complexity increases after the repeated floating point operation as a result the performance of field-programmable gate arrays (FPGAs) used for floating-point applications is decreased due to this floating point

VLSI Architecture for DCT Based On High Quality DA
free download
U Sharma, T Verma, R Jain erpublication.org ABSTRACT Discrete Cosine Transform (DCT) is the major building blocks in an image and video compression system, which can be achieved using various specialized algorithms. It is also being used in various standardized coding schemes. Such as JPEG, MPEG-2, and

VLSI IMPLEMENTATION OF NOISE CANCELLATION IN AUDIO SIGNALS USING LMS AND RLS ALGORITHMS
free download
ABSTRACT In this paper the eminence of the Recursive Least Squares (RLS) algorithm over LMS algorithms is provided. This algorithm is designed to provide similar performance to the LMS algorithm while reducing the computation time. This paper represents the

VLSI Architecture of High Performance Turbo Decoder for Wireless Sensor Networks
free download
ABSTRACT The sensor nodes of a wireless sensor network (WSN) are typically required to maintain sporadic but reliable data transmissions for extended periods of time. However, in applications the sensor nodes have to be small, preventing the use of bulky batteries. The

A VLSI Architecture for Color Space Transformation Module in an Object Tracking System
free download
R Mishra cryptonindia.com ABSTRACT The increasing demand for real time image and video processing applications has paved the way for innovation of efficient VLSI architectures for these systems. In this paper an efficient color space transformation algorithm is implemented in VHDL (VHSIC

A NEW APPROACH FOR DELAY AND LEAKAGE POWER REDUCTION IN CMOS VLSICIRCUITS
free download
ABSTRACT In the nanometer range design technologies dynamic power dissipation is very important issue in present peripheral devices. In the CMOS based VLSI circuits technology is scaling towards down in respect of size and achieving higher operating speeds. We

Low-Power and Low-Area Dual Dynamic Node Hybrid Flip-Flop Featuring Efficient Embedded Logic for Low Power CMOS VLSI Circuits Using 120nm
free download
ABSTRACT In this paper, a new dual dynamic node hybrid flip-flop (DDFF) and a novel embedded logic module (DDFFELM) based on DDFF are introduced. The DDFF offers power and area reduction when compared to the conventional flip-flops. The main aim of

VLSI Implementation of DES TDES Algorithm with Cipher Block Concept
free download
ABSTRACT This paper presents FPGA implementation of the DES and Triple-DES with improved security against power analysis attacks. This is programmed in verilog. DES TDES is basically used in various cryptographic applications and wireless protocol

FPGA Design of Reconfigurable Binary Processor Using VLSI
free download
ABSTRACT Binary image processing is a powerful tool in many image and video applications. In this paper we proposed efficient hardware architecture of Binary image processor for low power applications and also propose an Efficient Majority Logic Fault Detection algorithm

A Real Time Implementation of an Image Scaling Processor Using VLSI Technique
free download
ABSTRACT Image scaling is a very important technique and has been widely used in many image processing applications. In applications where the scaling process must be performed at the display rather than at the CPU OR GPU, dedicated hardware

Memristor Mos Content Addressable Memory Operating At 32-Nm for Future High Performance Search Engine Using VLSI Technology
free download
ABSTRACT In recent years the demand for low power devices has been increases tremendously. To solve the power dissipation problem, many researchers have proposed different ideas from the device level to the architectural level and above. However, there is

An Efficient VLSI Implementation of Lossless ECG Encoder Design
free download
ABSTRACT An efficient VLSI implementation of a lossless electrocardiogram encoding circuit is designed for remote monitoring service. To reduce the wireless transmission power and the amount of storage data, an efficient lossless encoding algorithm had been built for the

Power Efficient Design of BILBO using Various Sequential Elements for Low power VLSIApplications (Basic 5T-transistor and 5T-with MTCMOS)
free download
ABSTRACT This paper enumerates low power design of BILBO (Built-In-Logic-Block-Observer) using Basic 5T-TSPC clocked latch and 5T-TSPC (MTCMOS) clocked latch. The clocked latches are basic building block to design the BILBO. The clocked latches consumes more

Performance Analysis of High Performance Energy Efficient Logic Styles in VLSI
free download
ABSTRACT This paper presents a comparative study of high performance energy efficient logic styles in VLSI circuits. It has a keen role in the field of VLSI circuits. As the VLSI technology is upgrading this energy efficient logic styles are also upgrading. This logic

Stacked Keeper with Body Bias: A New Approach to Reduce Leakage Power for Low PowerVLSI Design
free download
KN Bhargav, A Suresh, G Saini cryptonindia.com ABSTRACT In this paper we present a technique named as stacked keeper with body bias (SK- BB). It uses stack effect to existing sleepy keeper technique along with body bias for ultra low static power consumption. A 4-bit CMOS adder circuit is designed using existing

VLSI Based Design of Low Power and Linear CMOS Temperature Sensor
free download
ABSTRACT Complementary Metal Oxide Semiconductor (CMOS) temperature sensor is introduced in this paper which aims at developing the MOSFET as a temperature sensing element operating in sub-threshold region by using dimensional analysis and numerical

A NOVEL APPROACH ON PSO IN VLSI ROUTING
free download
ABSTRACT The performance of very large scale integration (VLSI) circuits predominantly depends on routing of interconnected circuits. The chief problems in the design of VLSI layouts are wire sizing, buffer sizing and buffer insertion. This technique exits to improve

SYNTHESIS AND SIMULATION OF HYPERBOLIC TANGENT ACTIVATION FUNCTION USING HYBRID APPROMATION IN VLSI
free download
ABSTRACT Hardware implementation of neural network has major application in analog and digital areas. The major building blocks for implementation are adder, multiplier and non- linear activation function. A major challenge is faced in the implementation of activation

A 3.52 GSps Throughput VLSI Architecture of I/Q Imbalance Compensator for 60 GHz Communication System
free download
C Wang, X Fu, Y Yan ieee.org.hk ABSTRACT This paper presents an I/Q imbalance compensator which can support the throughput rate of 3.52 GSps and improve the signal-to-interference ratio (SIR) from 10.1 dB to 33 dB for a 60-GHz communication system in the IEEE 802.11 ad standard. The

LOW-TRANSITION TEST PATTERN GENERATION FOR MINIMIZING TEST POWER IN VLSICIRCUITS USING BIST
free download
ABSTRACT Any Integrated circuit (IC) manufactured by the semiconductor manufacturing company contains test circuit and the circuit under test (CUT). The test circuit is used to test the correct functionality of the CUT and which is called Built In Self Test (BIST). This Built

Improving Message Authentication by Integrating Encryption with Hash function and its VLSIImplementation
free download
ABSTRACT Presently more techniques are available for improving secure data communication. Public and private key encryption algorithms are available to provide confidentiality. Encryption techniques provide origin authenticity by using shared secret key. Advanced

Survey on Low Power VLSI Testing Techniques
free download
S Bhojwani, S Udvanshi coronapublication.com ABSTRACT Power dissipation has become a major design objective in many application areas, such as wireless communications and high performance computing, thus leading to the production of numerous low-power designs. At the same time, power dissipation is also

Crosstalk Avoidance in VLSI Interconnects Using Bus Encoding Method
free download
B Venkataramana, PK Kumar, PS Reddy International Journal of ripublication.com ABSTRACT In current Deep Sub Micron (DSM) Technology, interconnects play an important role in overall performance of the chip. Scaling reduces the distance between interconnects which increases the coupling capacitance, propagation delay, power dissipation and

VLSI Design of ECG QRS Complex Detection using Multiscale Mathematical Morphology
free download
SV Gopeka, L Murali, T Manigandan cryptonindia.com (VLSI) based electrocardiogram (ECG) QRS complex detector for wearable devices in body sensor networks. Multiscale Mathematical Morphology (MMM) is a method used to suppress background noise and baseline wandering from original ECG signal. The major

Impact of Hybrid Pass-Transistor Logic (HPTL) on Power, Delay and Area in VLSI Design
free download
ABSTRACT Power reduction is a serious concern now days. As the MOS devices are wide spread, there is high need for circuits which consume less power, mainly for portable devices which run on batteries, like Laptops and hand-held computers. The Pass-

Implementation of Hyperbolic Tangent Activation Function in VLSI
free download
ABSTRACT This work presents the implementation of Artificial Neural Network (ANN) chip, which can be designed to implement certain functions. Usually designing of neural networks is done using software tools in the computer system. The neural networks designed off-

An Optimized Successive Interference Cancellation for CI-Based Multiuser Detection UsingVLSI Implementation Strategy
free download
ABSTRACT In this project, we proposed variable rate carrier interferometry multicarrier code division multiple access (CI/MC-CDMA) multiuser transceiver that achieves a data rate of minimum 1Gbps equivalent to the 4G standard of IEEE. Multiple Carrier-Code Division

Sleepy Keeper Approach for Common Source CMOS Amplifier for Low-Leakage Power VLSIDesign
free download
ABSTRACT As the scaling goes deep into nano-meter range the leakage power dissipation has overtaken the dynamic power dissipation in VLSI circuits. The demand for low power consumer electronic gadgets which are portable reliable and with a long battery life has

Multiplier Based and Canonical Signed Digit Based VLSI Architecture for Discrete Wavelet Transformation
free download
ABSTRACT THE DISCRETE wavelet transform (DWT) is a multi resolution analysis tool with excellent characteristics in the time and frequency domains. Through the DWT, signals can be decomposed into different sub-bands with both time and frequency information. The

VLSI Architecture Design Parameters and Tools: A Review
free download
ABSTRACT Electronic Systems are necessity of everyday lives. It's an integral part in financial networks, communication systems, power plants systems and personal computers solutions. Electronic systems network is increasingly based on complex and hybrid VLSI (Very Large

A Low Hardware Complex Bilinear Interpolation Algorithm of Image Scaling for VLSIImplementation
free download
Abstract In this brief, a low-complexity, low-memoryrequirement, and high-quality algorithm is proposed for VLSI implementation of an image scaling processor. The proposed image scaling algorithm consists of a sharpening spatial filter, a clamp filter, and a bilinear

VLSI IMPLEMENTATION OF BACK PROPAGATED NEURAL NETWORK FOR SIGNAL PROCESSING
free download
ABSTRACT Mainly due to the rapid advances in integration technologies, large-scale systems design-in short, due to the advent of VLSI Technology, the number of applications of integrated circuits in high-performance computing, telecommunications, and consumer

VLSI Architecture for MB-OFDM Transmitter
free download
ABSTRACT (MB-OFDM) Multi-Band Orthogonal Frequency Division Multiplexing is a suitable solution for implementation of high speed data transmission in ultra wideband spectrum by dividing the spectrum into available multiple bands. In MB-OFDM system the most

Design of 2-D DWT VLSI Architecture for Image Compression
free download
TS Chandraraju, S RadhaKrishnan iieng.org ABSTRACT In this paper, a new data access scheme for the computation of lifting 2-D DWT (Discrete Wavelet Transform) using systolic arrays with block processing is suggested. From DG (dependence graph) linear systolic array is directly derived. For parallel and pipeline

Design of area efficient chip layout of fractional N-phase locked loop using VLSI technology. A
free download
ABSTRACT In communication system power is one of the most important parameter. Power is the amount to function or generating out energy. This means that it is a way of measuring how fast a function can be carried out. So power has become one of the most important

DHT ALGORITHM FOR HIGHLY PARALLEL IMPLENTATION OF VLSI ARCHITECTURE
free download
SN Shagufa, SS Anjum, BR Reddy erpublication.org ABSTRACT A new very large scale integration (VLSI) algorithm for a 2N-length discrete Hartley transform (DHT) that can be efficiently implemented on a highly modular and parallel VLSI architecture having a regular structure is presented. The DHT algorithm can be

Power Consumption of CIC Decimation Filter with Sharpened Zero Rotation Using VLSITechnique
free download
R Mononisha, G Brindha internationaljournalssrg.org ABSTRACT The CIC decimation filter with zero rotation and compensation section was developed and presented in this paper. The magnitude response of the filter with various decimation factors considering different stages were estimated and compared with the

HIGH SPEED AND LOWER HARDWARE COMPLEXITY VLSI ARCHITECTURE FOR LIFTING BASED DISCRETE WAVELET TRANSFORM
free download
ABSTRACT A high speed and lower hardware complexity 2-D discrete wavelet transform architecture has been proposed. Previous DWT architectures are based on the modified lifting scheme or the flipping structure. Folded architecture method has been adopted. In

VLSI Implementation analysis of area and speed in QSD and Vedic ALU
free download
ABSTRACT Arithmetic operations in digital signal processing applications suffer from problems including propagation delay and circuit complexity which may occupy larger area. We have two high performance methods among all ALU circuitry. First one is QSD and

Performance Analysis Of DSTN Structured Full Adders In Low Power VLSI Circuits
free download
ABSTRACT the growing market of mobile, batterypowered electronic systems (eg, cellular phones, personal digital assistants, etc.) demands the design of microelectronic circuits with low power dissipation. As density and complexity of the chips continue to increase, the

VLSI Implementation of Enhanced AES Cryptography
free download
ABSTRACT Advanced Encryption Standard (AES) is a Federal Information Processing Standard (FIPS) and categorized as Computer Security Standard. The AES algorithm is a block cipher that can encrypt and decrypt digital information. The AES algorithm is

A LFSR based Binary Numeral System Using CMOS VLSI
free download
Abstract The integrated chip manufacturing technology has made an evaluation by shrinking the size of a chip and enhancing its better performance. Shrinkage of chip introduces problems including heat dissipation and power consumption. Binary numeral

A Decimal Floating Point Arithmetic Unit for Embedded System Applications using VLSITechniques
free download
ABSTRACT With the growing popularity of decimal computer arithmetic in scientific and commercial financial and internet based applications, hardware realization of decimal arithmetic algorithm is gaining more importance. Hardware decimal arithmetic unit serve

HIGH THROUGHPUT DECODING ARCHITECTURE FOR BINARY CODE OPERATION AND MITIGATING THE SOFT ERRORS IN VLSI DEVICES
free download
ABSTRACT We present an approach to designing capacity-approachinghigh-girth lowdensity parity-check LDPC) codes thatare friendly to hardware implementation and compatible withsome desired input code structure defined using a prototype. The

SPEED ENHANCEMENT IN 64-BIT PARALLEL PREFIX VLSI ADDER USING AN EFFICIENT METHOD
free download
ABSTRACT High speed computation is an important parameter to evaluate the overall performance of computing devices. To manipulate the addition operations with more speed and accuracy parallel prefix addition is a better method. In this paper a 64-bit parallel

An Evolutionary Transition of conventional n MOS VLSI to CMOS considering Scaling, Low Power and Higher Mobility
free download
ABSTRACT This paper emphasizes on the gradual revolution of CMOS scaling by delivering the modern concepts of newly explored device structures and new materials. After analyzing the improvements in sources, performance of CMOS technology regarding conventional

VLSI Implementation of Reduced Resource Allocation for Modified Carry Look-Ahead Adder
free download
ABSTRACT With the increase in the VLSI technology level the system level designs are becoming too complex by effect of brutal design of low level complex design. The reduction in resources allocated to implement the system contributes to the significant decrease in

VLSI Power Efficiency, Leakage, Dissipation and Management Techniques: A Survey
free download
ABSTRACT Modern processor and controlling systems are using increasingly sized-up on- chip cache memory. With this there has been significant increase in leakage power consumption. This reason, accounts for overall and cache power management research

VLSI Based Image Zooming Application by a Novel Adaptive Edge Enhancement Technique
free download
ABSTRACT In this paper, an adaptive edge enhancement technique is proposed for two- dimensional (2-D) image scaling application. The anticipated image scaling algorithm consists of an edge detector, bilinear interpolation and sobel filter. The bilinear

TD-AMS PROCESSING FOR VLSI IMPLEMENTATION OF LDPC DECODER
free download
Abstract An Efficient analog to digital interface (TDC/DTC) is presented. In particular, we explore time-based techniques for data conversion, which can potentially achieve significant reductions in power consumption while keeping silicon chip area will be very small. On

Power and Area Efficient Error Tolerant Adder Using Pass Transistor XOR Logic in VLSICircuits
free download
ABSTRACT In adders the truncation and round off errors cannot be ignored. A new type of adder that is error tolerant adder (ETA) is proposed to tolerate those errors and to attain low power consumption. To rectify the errors in adders error tolerant adder (ETA) is proposed

VLSI Based Fluid Flow Measurement Using Constant Temperature Hot Wire Anemometer
free download
ABSTRACT The performance of a hot-wire anemometer configuration is affected by variation in the fluid temperature. The classical temperature compensation techniques in such anemometers employ two sensors. The performance of a temperature-compensated

Power Efficient Vlsi Architecture For High Throughput And Low Area Implementation Of Lifting 2-D Dwt
free download
JMD Babu, MB Sudha iosrjournals.org ABSTRACT In this paper a new VLSI architecture was implemented for computation of lifting twodimensional (2-D) discrete wavelet transform (DWT). This structure was data transposition free and it was implemented by using linear systolic array which is derived

Advanced VLSI Design Methodologies for Emerging Industrial Multimedia and Communication Applications
free download
T Schumann downloads.hindawi.com This is a special issue published in VLSI Design. All articles are open access articles distributed under the Creative Commons Attribu- tion License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

High Performance Adder Circuit In Vlsi System
free download
ABSTRACT In VLSI system. The integrated circuit design has important role. The various parameters are considering for design the circuit. The important parameters are power and delay. The different tools are used to perform the operation. However, here the

Implementing the L8 segment Voronoi diagram in CGAL and an application in VLSI pattern analysis
free download
ABSTRACT In this work we present a CGAL (Computational Geometry Algorithm Library) implementation of the line segment Voronoi diagram under the L8 metric, building on top of the existing line segment Voronoi diagram under the Euclidean (L2) metric. CGAL is an

A Vlsi Architecture With Data Dependency Detector For Image Interpolation And Impulse Denoising
free download
ABSTRACT In this paper a low complexity, less memory requirement and high performance data dependency algorithm is proposed for very large scale integration (VLSI) implementation of an image scaling and impulse denoising processor. This algorithm

Analysis of VLSI Pacemaker Designs: A review
free download
ABSTRACT In this paper, we have reviewed different types of intelligent control systems designs that are used to regulate the heart rate by the use of pacemaker. These system works in a closed loop way and works on the theory that the heart is powered by the

Development of EDA Tool with Easy Plugin for New VLSI Algorithms
free download
ABSTRACT An EDA tool has been developed with an emphasis on teaching-learning of various algorithms related to graph theory and VLSI design. The tool provides basic graphics operations, coordinate control and a command processor. Extensions to the

VLSI Design of Fast Addition Using QSD Adder for Better Performance
free download
ABSTRACT The high speed digital circuits became more prominent with incorporating information processing and computing. Arithmetic circuits play a very critical role in both general-purpose and application specific computational circuits. The modern computers

VLSI IMPLEMENTATION OF DISTRIBUTED ARITHMETICFIR FILTER
free download
ABSTRACT Hardware implementation of FIR Filter has major applications in Analog and Digital areas. In this project a multiplier less fir filter is designed and implemented based on a distributed arithmetic algorithm. The proposed work achieves the reduction of hardware

Comparative Analysis of CMOS Mixers in 45NM VLSI Technology
free download
Abstract Frequency translation in a system is performed by a non-linear device known as a mixer. A substantial discussion has been provided for several CMOS circuit configurations which are currently used to realize a frequency mixing operation with more emphasis on

A Novel Delay and Overshoot Estimation model for VLSI Global Interconnects
free download
ABSTRACT In this paper, we propose a novel, simple and accurate delay and overshoot estimation model for VLSI Global Interconnects, based on new matrix Pade-type approximant (MPTA). This model reduces the computational complexity by considering

DESIGN AND IMPLEMENTATION OF SLEEP TRANSISTOR BASED LOW POWER CMOS DESIGN FOR SUBMICRON VLSI TECHNOLOGIES
free download


A Two-bit Bus-Invert Coding Scheme With a Mid-level State Bus-Line for Low Power VLSIDesign
free download
ABSTRACT A new bus-invert coding circuit, called Two-bit Bus-Invert Coding (TBIC) is presented. TBIC partitions a bus into a set of two-bit sub-buses, and applies the bus-invert (BI) algorithm to each subbus. Unlike ordinary BI circuits using invert-lines, TBIC does not

Energy Efficient Advanced Low Power CMOS Design to reduce power consumption in Deep Submicron Technologies in CMOS Circuit for VLSI Design
free download
ABSTRACT Low power has emerged as a principal theme in today's electronic industry. Energy efficiency is one of the most critical features of modern electronic systems designed for high speed and portable applications. Reduction of power consumption makes a device more

A REPORT ON LOW POWER VLSI CURCUIT DESIGN
free download
ABSTRACT We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. The most important factor in any system design is power. Low power became a major factor where power dissipation has become as important

Optimization Techniques for Low Power VLSI Circuits
free download
ABSTRACT Power dissipation has emerged as an important design parameter in the design of microelectronic circuits, especially in portable computing and personal communication applications. In this paper, we survey state-of-the-art optimization methods that target low

Implementation of BDDs by Various Techniques in Low Power VLSI Design.
free download
ABSTRACT Power has become an important design parameter in today's ultra low submicron digital designs as found. The impact of the increase in power is multi-discipline to researchers ranging from power supply design, power converters, voltage regulators

CMOS VLSI Design of Low Power Comparator Logic Circuits
free download
Abstract As the demand of portable consumer electronic products increases rapidly and the chip size decreases, designers are facing many challenges towards the circuit area and power. Decades ago, engineers worried about the speed of operation of the system. They

CMOS VLSI Implementation of Adders with Low Leakage Power
free download
ABSTRACT Due to the semiconductor technology revolution, portable consumer electronic products are made with more features. The power dissipation factor is important since those systems are built with plenty of transistors. As the sizes of the transistors shrink and the

LOW POWER VLSI COMPRESSORS FOR BIOMEDICAL APPLICATIONS.
free download
Abstract We present a new design for a 1-bit full adder featuring hybrid-CMOS design style. Our approach achieves low-energy operations in 90nm technology. Hybrid-CMOS design style makes use of various CMOS logic style circuits to build new full adders with

Design and Analysis of CMOS Multiplier and EEAL Multiplier for Low Power VLSI Application
free download
Efficient Adiabatic Logic (EEAL) is proposed. In adiabatic logic, which dissipates less power than static CMOS logic, have been adiabatic circuits called energy efficient adiabatic logic introduced as a promising new approach in low power circuit design. The adiabatic

Design of Storage Element for Low Power VLSI System
free download
ABSTRACT The storage elements are major power consuming component in VLSI system. The power reduction of storage element leads to reduction of global power consumption of VLSI system. In this paper, a Proposed single edge triggered (SET) and a Proposed double

Power Efficient Design of BILBO using Various Sequential Elements for Low power VLSIApplications (Basic 5T-transistor and 5T-with MTCMOS)
free download
Abstract This paper enumerates low power design of BILBO (Built-In-Logic-Block-Observer) using Basic 5T-TSPC clocked latch and 5T-TSPC (MTCMOS) clocked latch. The clocked latches are basic building block to design the BILBO. The clocked latches consumes more

Stacked Keeper with Body Bias: A New Approach to Reduce Leakage Power for Low Power VLSI Design
free download
ABSTRACT In this paper we present a technique named as stacked keeper with body bias (SK- BB). It uses stack effect to existing sleepy keeper technique along with body bias for ultra low static power consumption. A 4-bit CMOS adder circuit is designed using existing

Survey on Low Power VLSI Testing Techniques
free download
ABSTRACT Power dissipation has become a major design objective in many application areas, such as wireless communications and high performance computing, thus leading to the production of numerous low-power designs. At the same time, power dissipation is also

Sleepy Keeper Approach for Common Source CMOS Amplifier for Low-Leakage Power VLSIDesign
free download
Abstract As the scaling goes deep into nano-meter range the leakage power dissipation has overtaken the dynamic power dissipation in VLSI circuits. The demand for low power consumer electronic gadgets which are portable reliable and with a long battery life has

Performance Analysis Of DSTN Structured Full Adders In Low Power VLSI Circuits
free download
ABSTRACT the growing market of mobile, batterypowered electronic systems (eg, cellular phones, personal digital assistants, etc.) demands the design of microelectronic circuits with low power dissipation. As density and complexity of the chips continue to increase, the

Issues of Optimization Techniques Targeting Low Power VLSI Circuits Design
free download
ABSTRACT In this paper the issues and state-of-the-art optimization methods that target low power dissipation in VLSI circuits Design. Optimizations at the circuit, logic, architectural and system levels are considered. The issues related to the Power dissipation in the design

VLSI Implementation and Analysis of Parallel Adders for Low Power Applications
free download
ABSTRACT Carry select adder (CSLA) is known to be the fastest adder among the conventional adder structures. Due to the rapidly growing mobile industry not only the faster arithmetic unit but also less area and low power arithmetic units are needed. The modified

A LOW POWER CMOS VOLTAGE MODE SRAM CELL FOR HIGH SPEED VLSI DESIGN
free download
ABSTRACT In this paper we propose a novel design of a low power static random access memory (SRAM) cell for high speed operations. The model adopts the voltage mode method for reducing the voltage swing during the write operation switching activity. Dynamic

Low-Power and Low-Area Dual Dynamic Node Hybrid Flip-Flop Featuring Efficient Embedded Logic for Low Power CMOS VLSI Circuits Using 120nm
free download
ABSTRACT In this paper, a new dual dynamic node hybrid flip-flop (DDFF) and a novel embedded logic module (DDFFELM) based on DDFF are introduced. The DDFF offers power and area reduction when compared to the conventional flip-flops. The main aim of

VLSI Based Design of Low Power and Linear CMOS Temperature Sensor
free download
ABSTRACT Complementary Metal Oxide Semiconductor (CMOS) temperature sensor is introduced in this paper which aims at developing the MOSFET as a temperature sensing element operating in sub-threshold region by using dimensional analysis and numerical

Low-Power VLSI Implementation in Image Processing using Programmable CNN
free download
Abstract The low power CMOS implementation is based on a combination of MOS transistors operating in di erent modes: weak and stronginversion. We propose, MOS transistors operating in the lateral bipolar mode. This combination has enabled a VLSI

Design and Implementation of Low Power High Speed VLSI DSP System for Multirate Polyphase Interpolator
free download
Multirate filtering to provide signal processing in wireless communication system. There are many applications in which sampling rate must be changed. Recent advances in mobile computing and communication applications demand low power and high speed VLSI DSP

TEST DATA COMPRESSION FOR LOW POWER TESTING OF VLSI CIRCUITS
free download
VLSI circuits are Test data volume and excessive test power. Among the many different compression coding schemes proposed till now, the CCSDS (Consultative Committee for Space Data Systems) lossless data compression scheme is one of the best. This paper

Low Power Multi Bit Flip Flops Design for VLSI Circuits
free download
ABSTRACT In this paper we present a power optimization technique to reduce clock power by using multi bit flip flop method. We have proposed the several techniques to overcome the problems of flip-flops replacement without timing and placement capacity constraints

VLSI DESIGN PROCESS FOR LOW POWER DESIGN METHODOLOGY USING RECONFIGURABLE FPGA
free download
Abstract Modern digital processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many applications, the growth of algorithmic complexity is already faster than the

An Efficient VLSI Implementation of Low Power AES–CTR
free download
ABSTRACT This paper delineates an efficient VLSI architecture implementation in order to increase the throughput and security using Advanced Encryption standard (AES) algorithm. The existing architecture depicts the blocks like Sub Bytes, Shift Rows, Mix Column, and

LOW-TRANSITION TEST PATTERN GENERATION FOR MINIMIZING TEST POWER IN VLSICIRCUITS USING BIST
free download
ABSTRACT Any Integrated circuit (IC) manufactured by the semiconductor manufacturing company contains test circuit and the circuit under test (CUT). The test circuit is used to test the correct functionality of the CUT and which is called Built In Self Test (BIST). This Built

DESIGN AND IMPLEMENTATION OF SLEEP TRANSISTOR BASED LOW POWER CMOS DESIGN FOR SUBMICRON VLSI TECHNOLOGIES
free download


An Evolutionary Transition of conventional n MOS VLSI to CMOS considering Scaling, Low Power and Higher Mobility
free download
ABSTRACT This paper emphasizes on the gradual revolution of CMOS scaling by delivering the modern concepts of newly explored device structures and new materials. After analyzing the improvements in sources, performance of CMOS technology regarding conventional

FPGA Implementation of Low Power High Speed VLSI Architecture using Multirate Polyphase Filter
free download
RM Rewatkar, SL Badjate rspublication.com ABSTRACT Paper Presents design and Implementation of Low Power high speed VLSI for Multirate Polyphase filter on FPGA platform. The proposed device is Polyphase decimator and interpolator, it design by direct and transpose form so that circuit complexity will be

A VLSI BASED LOW POWER APPROACH USING DYNAMIC VOLTAGE SCALING VOLTAGE ISLANDS FOR EMBEDDED PROCESSOR
free download

0 thoughts on “Vlsi Research Papers 2014 Dodge

Leave a Reply

Your email address will not be published. Required fields are marked *